DAC Channel-B (Offset=6)

DAC Channel-B Register

DAC Channel-B LSB. Offset=0x6, Byte 0. Offset=0x6, Word 0.

D7	D6	D5	D4	D3	D2	D1	D0
DB7	DB6	DB5	DB4	DB3	DB2	DB1	DB0

DAC Channel-B MSB. Offset=0x7, Byte 0. Offset=0x6, Word 0.

D15	D14	D13	D12	D11	D10	D9	D8
DB15	DB14	DB13	DB12	DB11	DB10	DB9	DB8

Bit Definitions

NAME	DIRECTION	DEFAULT	DESCRIPTION
DB[15:0]	w	- na -	DAC Channel-A data word in 16-Bit mode. DA0 is the least significant bit and DB15 is the most significant data bit.

BIT STRING NAME	DIRECTION	CONNECTOR PIN POSITION	PHYSICAL I/O TYPE
DB[15:0]	--->	J7.16 (DAC_OUT_2)	Analog Output

Description

Each channel is updated once the MSB is written. Writing only the MSB will update the DAC channel output. The results of changing jumper settings at J5 will only take affect after writing the MSB on the DAC output. The two 8-bit DAC registers can be written simultaneously by writing the data as a 16-bit I/O transaction (Examples: “out dx, ax” or “outpw(base_address+4, dac_value)” ).

DAC outputs are available in either DAS16jr/16 or DAS1602 modes. The DAC outputs are always enabled and available for use. The DAC output bit alignments can be adjusted for either 12-bit legacy operation or full 16-bit DAC mode.

POWER UP or RESET

At power-up or reset the DAC outputs are at set to zero volts.

OUTPUT VOLTAGE CONVERSION

OUTPUT RANGE	DB1_UB J5 *	DB1_R J5 *	RESOLUTION	NEG FULL SCALE VOLTAGE	POS FULL SCALE VOLTAGE	NEG FULL SCALE HEX	POS FULL SCALE HEX
+/- 10 Volts	1	1	305 uV	-10.00	+10.00	0x0000	0xFFFF
+/- 5 Volts	1	0	153 uV	-5.000	+5.000	0x0000	0xFFFF
0 - 10 Volts	0	1	153 uV	0.000	+10.00	0x0000	0xFFFF
0 - 5 Volts	0	0	76 uV	0.000	+5.000	0x0000	0xFFFF