Continuous High Speed Sampling

CPU read-out N-blocks of data per unit of time (i.e. CPU-burst reads)
Sample timing and intra-sample timing in ADC-burst modes adjustable to 25 nanosecond resolution.
FIFO interrupt generated interrupts and events very flexible to support optimal CPU bursting (ultimately dependent on other CPU overhead or rhythmic behavior such as flash drives).
Data fragment buffer reduces PC/104 generated IOCHRDY or wait conditions, further enhancing PC/104 data bus throughput.
Large FIFO depth enhances the time decoupling between CPU activities and precise sample timing.

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