/* STX104 Register Set Definitions */
#define STX104_SOFTWARE_STROBE                            0   /* offset (to be added to the base address) */
#define STX104_ADC_DATA_LSB                               0
#define STX104_ADC_DATA_MSB                               1
#define STX104_ADC_DATA                                   0
#define STX104_CHANNEL                                    2
#define STX104_DIGITAL_OUTPUTS                            3
#define STX104_DIGITAL_INPUTS                             3
#define STX104_DAC_CHANA_LSB                              4
#define STX104_DAC_CHANA_MSB                              5
#define STX104_DAC_CHANA                                  4
#define STX104_DAC_CHANB_LSB                              6
#define STX104_DAC_CHANB_MSB                              7
#define STX104_DAC_CHANB,DACB                             6
#define STX104_CLEAR_INTERRUPTS                           8
#define STX104_ADC_STATUS                                 8
#define STX104_ADC_CONTROL                                9
#define STX104_PACER_CLOCK_CONTROL                        10
#define STX104_FIFO_FLAGS                                 10
#define STX104_ADC_CONFIGURATION                          11
#define STX104_CT0_DATA                                   12
#define STX104_CT1_DATA                                   13
#define STX104_CT2_DATA                                   14
#define STX104_CT_CONFIGURATION                           15
#define STX104_FIFO_DATA_STATUS                           15
#define STX104_CONVERSION_DISABLE                         1028
#define STX104_BURST_MODE_ENABLE                          1029
#define STX104_BURST_FUNCTION                             1030
#define STX104_EXTENDED_STATUS                            1031
/* Applicable to Firmware Revision 080214H and beyond    */
#define STX104_INDEXED_DATA_LSB                           12  /* offset (to be added to the base address) */
#define STX104_INDEXED_DATA_MSB                           13
#define STX104_INDEX_DATA                                 12
#define STX104_INDEX_POINTER                              14
// indexed register array
#define STX104_GENERAL_CONFIGURATION                      0   /* index */
#define STX104_INTERRUPT_SOURCE_SELECT                    2
#define STX104_INTERRUPT_CONFIGURATION                    4
#define STX104_INTERRUPT_THRESHOLD                        8
#define STX104_DIGITAL_OUTPUT_CONFIGURATION               12
#define STX104_DIGITAL_INPUT_CONFIGURATION                14
#define STX104_TRIGGER_CONFIGURATION                      16
#define STX104_TRIGGER_START_DELAY                        20
#define STX104_ANALOG_INPUT_GENERAL_CONFIG                32
#define STX104_ANALOG_INPUT_FRAME_TIMER                   36
#define STX104_ANALOG_INPUT_BURST_TIMER                   40
#define STX104_ANALOG_INPUT_FRAME_MAX                     44
#define STX104_ANALOG_INPUT_FRAME_COUNT                   48
#define STX104_CONVERSION_DISABLE_INDEXED                 64
#define STX104_BURST_MODE_ENABLE_INDEXED                  65
#define STX104_BURST_FUNCTION_ENABLE_INDEXED              66
#define STX104_EXTENDED_STATUS_INDEXED                    67
#define STX104_CT0_DATA_INDEXED                           68
#define STX104_CT1_DATA_INDEXED                           69
#define STX104_CT2_DATA_INDEXED                           70
#define STX104_CT_CONFIGURATION_INDEXED                   71
#define STX104_MISCELLANEOUS_OUTPUT_CONFIG                208
#define STX104_FIFO_DATA_AVAILABLE                        224
#define STX104_FIFO_CONFIGURATION                         228
#define STX104_SCRATCH_PAD                                248
#define STX104_BOARD_ID                                   250